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LRI-AEM-60DC8 · Firmware

Release history

Track AEM-60DC8 firmware versions — public release notes, binaries available on request.

  • v1.23
    Jun 07, 2026Stable
    • Honest CRC-error counter on a multidrop bus: the LCD MODBUS panel and registers 40074/40075 showed ~6–8% errors on a healthy bus — these were actually the OTHER slaves' responses being counted as line errors.
    • On a multi-slave bus each node physically receives the others' responses; the parser validates CRC before the address filter, so a neighbour's response (mis-parsed as a request) failed CRC and inflated the counter.
    • Now CRC errors are counted only for frames addressed to this slave (or broadcast): on a clean bus the value drops to ≈0. Full visibility (incl. foreign traffic) is retained in the diagnostic histogram.
    • Display/diagnostic-only change — no control path, no Modbus wire change (C-001 unchanged). device-qa reviewed (approved for EVT, no P0).

    Binary available on request ([email protected])

  • v1.22
    Jun 07, 2026Stable
    • New diagnostic-counter RESET register (Modbus W-only 40034, magic 0xD1A6): zeros the RX/TX frame totals, the aggregate CRC counter and the UART error (FE/NE/PE/TX) and TX-path diagnostic counters in one shot, giving a clean "since reset" baseline.
    • Fixes the GUI "~5% errors" false alarm: that percentage is a cumulative-since-boot stock (historical, from a past contention window), not the live rate — the current bus is clean (4 s CRC delta = 0).
    • Magic-gated write (FC16 qty=1): any value other than 0xD1A6 is rejected (`ILLEGAL_DATA_VALUE`), so a register sweep can't wipe the evidence; reading 40034 returns 0.
    • Counters are diagnostic-only (no watchdog/heartbeat dependency) — the reset is side-effect-free. Contract C-001 rotated; Utility mirror required.

    Binary available on request ([email protected])

  • v1.21
    Jun 06, 2026Stable
    • Non-blocking RS-485 TX (fixes RR-005): Modbus transmit is now interrupt/DMA-driven, freeing the CPU during send. Eliminates the IWDG reset seen under sustained large-block reads (back-to-back 96-register polls at 9600 bps).
    • Deterministic bus release: the DE line is dropped inside the TX-complete (USART TC) ISR — at interrupt scale, not scheduler scale — for consistent RS-485 turnaround.
    • New TX diagnostics block (Modbus R/O 40226–40233): TX_STARTED, TX_TC_CB, timeout and abort counters to field-prove the transmit path leaves no stale state.
    • Watchdog heartbeat diagnostics (Modbus R/O 40220–40225): per-task missed-heartbeat windows and live margin to the IWDG timeout, making the fix verifiable on-silicon.
    • Contract C-001 rotated (new 40220–40225 and 40226–40233 blocks); Utility mirror required.

    Binary available on request ([email protected])

  • v1.20
    Jun 05, 2026Stable
    • Modbus UART RX error counters (R/O 40030–40033): exposes framing (FE), noise (NE), parity (PE) and TX error separately from the aggregate CRC counter, for field diagnosis without SWD.
    • New DIAG_HEALTH LCD dashboard page 2 ("UART RX"): mirrors FE/NE/PE/TxE + CRC; the panel now cycles 3 pages (utilisation / RTOS pressure / UART errors).
    • Deterministic RX flush at boot/reconfigure: discards bytes captured during UART line-settling so a partial power-on frame can't be parsed as a CRC error on the first poll.
    • Additive, no change to the critical RX/TX path. Contract C-001 rotated (new 40030–40033 block); Utility mirror required.

    Binary available on request ([email protected])

  • v1.19
    Jun 05, 2026Stable
    • Button auto-repeat with acceleration on UP/DOWN: holding now repeats on a controlled curve (500 ms → 250 → 100 → 50 ms) instead of emitting a single long-press event.
    • Step acceleration (1 → 5 → 10) on the float editors (V/NTC thresholds, calibration, DI debounce), always clamped to min/max — no silent wrap.
    • Per-context profiles: fast numeric editors, menu navigation (fixed 200 ms) and password entry (fixed 400 ms); main pages/confirms preserve the deliberate 2 s press-and-hold actions.
    • No Modbus wire change — C-001 unchanged.

    Binary available on request ([email protected])

  • v1.18
    Jun 05, 2026Stable
    • New Modbus UI-language register `MBMAP_USER_LANGUAGE` (40067, R/W): values {0=EN, 1=PT, 2=ES}, default PT. A master can switch the device language remotely without using the LCD menu.
    • Validated write (FC16 qty=1): out-of-range values are rejected (`ILLEGAL_DATA_VALUE`), applied live to the LCD i18n and persisted to EEPROM.
    • The bootloader reads the same byte at boot, localising its own screens too — consistent language across app and BL.
    • Contract C-001 rotated (b9cea6a0 → c3b0c3b5); the Utility must add register 40067.

    Binary available on request ([email protected])

  • v1.17
    Jun 05, 2026Stable
    • First released build superseding v1.16: folds in the entire v1.16 alarm remediation and closes the M1/M2 bench gate on the signed v1.17 candidate.
    • i18n fix (ES): password value-entry label `STR_PWD_VALUE` from "Pwd:" to "Contr:", aligning with the other Spanish password screens (LCD-only, no behaviour change).
    • No Modbus wire change — C-001 not rotated.

    Binary available on request ([email protected])

  • v1.16
    Jun 04, 2026Stable
    • Unified per-channel alarm engine: the relay now honors operator-configured per-channel UV/OV delays and hysteresis (Modbus 40400–40423) instead of the previous global delay/hysteresis.
    • Sensor-fault precedence: when a sample is non-finite or stuck (Fase-4), the cause published at 40300 + LED + ALARM_SUMMARY now reads SENSOR_FAULT (previously mislabelled as UV), without contaminating UV/OV episode counters.
    • Stricter Modbus validation: voltage bands with v_min ≥ v_max are rejected with exception `ILLEGAL_DATA_VALUE 0x03` on both single-write and FC16 whole-frame.
    • Deterministic config reset: writing a new threshold/delay cancels in-flight PENDING countdowns and re-evaluates the channel from NORMAL with the new config.
    • Atomic configuration snapshot: the 10 Hz evaluator reads each channel's alarm config inside one critical section, eliminating torn frames during FC16 commits.

    Binary available on request ([email protected])

  • v1.15
    Jun 04, 2026Stable
    • New R/O block `RELAY_OVERRIDE_TELEM` (Modbus 40210–40219): exposes relay override state (operator BOUND/UNBOUND) without inflating the Modbus authentication surface.
    • Split deactivation counters: distinguishes OPERATOR_RELEASE (manual release via write 0) from LEASE_EXPIRY (lease lapsed when the master stopped refreshing) — previously a single aggregate counter.
    • Cumulative active-duration as a saturating uint32 seconds field (~136 yr, never wraps); read coherently in one FC03 qty=10.
    • Crash hardening: `Error_Handler()` no longer spins in a bare `for(;;)`; writes a `.noinit` breadcrumb (file/line/PC) and enters a red-LED panic blinker, with IWDG cycling the board so the event is captured in reset_log.
    • `BKP2R` build guard: prevents accidental compilation with forensics-on that would trample security counters.

    Binary available on request ([email protected])

  • v1.14
    Jun 04, 2026Stable
    • Calendar-aware RTC validation via FC16 (40131–40135): invalid dates such as 2026-02-29, 2028-02-30, day 0/32 or month 0/13 are now rejected with `ILLEGAL_DATA_VALUE 0x03` without altering the RTC.
    • Unified leap-year validation between LCD and Modbus: both use the same `rtc_driver_days_in_month` helper, eliminating validation divergence across interfaces.
    • Accepted ranges: year 2025..2099; month 1..12; day according to actual month length (28/29/30/31).

    Binary available on request ([email protected])

  • v1.13
    Jun 03, 2026Stable
    • New per-channel digital-input (DI) debounce configuration, exposed at Modbus 40180–40187, unit deciseconds (1..255 ds = 100 ms to 25.5 s).
    • Canonical R/W DI configuration block at 40174–40176 (mode, polarity, alarm enable) — replaces the previous R/O-only path; R/O mirrors at 40169–40171 remain available for reads.
    • FC16 whole-frame atomicity extended to the DI blocks: complete DI configuration can now be written in a single Modbus transaction; frames spanning reserved registers are cleanly rejected.
    • Power-fail persistence via CCITT-16 CRC over the primary config block: a power cut mid-write is detected at boot and triggers recovery to factory defaults (instead of partial garbage).

    Binary available on request ([email protected])

  • v1.10
    Jun 02, 2026Stable
    • Watchdog Fase 3 active: the IWDG is refreshed only when all 3 supervised tasks (SAMPLE | MODBUS | UI) hit their heartbeat within the 200 ms window; a hung task is now reset and the cause is captured in `MBMAP_RESET_REASON_WATCHDOG`.
    • Relay test pulse is non-blocking: the UI task is no longer blocked via `HAL_Delay` during a test, so the heartbeat keeps beating. Relay actuation precedence: test pulse > override > alarm.
    • Startup registration barrier: the IWDG is refreshed unconditionally until every supervised task has checked in at least once (or until `WDT_REG_BARRIER_MS` = 4000 ms), preventing false resets during a slow-but-healthy boot.

    Binary available on request ([email protected])

  • v1.09
    Jun 02, 2026Stable
    • Modbus relay override (40172–40173): operator can force the relay OFF (mode 1) or ON (mode 2) with a 3 s monotonic lease, or release back to automatic (mode 0 = BOUND/AUTO).
    • Fail-to-safe: any path of uncertainty (lease expiry, reboot, watchdog, power-cycle) resolves to AUTO — there is no stuck UNBOUND state.
    • R/O status packed in 40173 (bit0 relay physical, bit1 override active, bits 8..11 reason) is read coherently with 40172 in a single FC03 qty=2.
    • Per-SKU capability gate: override is DISABLED by default and only provisioned in approved builds (`-DAEM_RELAY_OVERRIDE_CAPABLE=1`); non-capable SKUs NACK with reason=cap-disabled.

    Binary available on request ([email protected])

  • v1.08
    Jun 01, 2026Stable
    • Authoritative alarm telemetry at 40164–40171: `SYS_HEAP_FREE` (live heap free as uint32), `ALARM_SUMMARY` (canonical red-LED/relay state), `NTC_ALARM_STATE`, `DI_ALARM_BITMAP`, and un-shadowed DI config mirrors.
    • Modbus clients no longer re-derive (and mismatch) the alarm state: read `ALARM_SUMMARY` (40166) for the canonical state that drives the relay.

    Binary available on request ([email protected])

  • v1.06
    May 31, 2026Stable
    • Channel active/inactive gating (Fase 7): per-channel masks `v_alarm_enabled_mask` (40424) for the 6 analog channels and `di_active_mask` (40425) for the DIs. Inactive channels are excluded from alarm evaluation and from the LCD.
    • New masked live DI bitmap at 40426: `digital_io_read_di_bitmap() & di_active_mask` at an uncontested address (the legacy mirror at 40140 is shadowed by C-013 on ≥272 builds).
    • Compacted LCD: only renders active analog/DI channels, with an empty-state hint ("No active chan." / "Enable in Setup") when a group has none enabled.
    • BL-unlock collision fix: R/O diagnostics `AEMUP_REJ_BUFFER` and `TELEM_BOOT_FAIL_REASON` relocated from 40098/40099 to 40148/40149, freeing the bootloader challenge/response block.

    Binary available on request ([email protected])

  • v1.05
    May 30, 2026Stable
    • Critical fix L1: Fase 6 per-channel alarm config relocated from the secondary EEPROM block (0x200+) to the primary block tail (0x0F1, 0x0F8–0x0FF) — previously the secondary block aliased primary on the CAT24C02 256 B chip and any write to 0x200+ would silently corrupt the primary config.
    • Per-channel UV/OV delays packed as 4-bit nibbles (0–15 s) in the primary tail; new EEPROM layout version 0x03 with automatic migration from 0x02.
    • L2 breadcrumbs in `.noinit` SRAM: `save_all_breadcrumb_t` preserves phase marker, PC, LR, xPSR across soft resets. HardFault handler stamps crash_pc/lr/xpsr; logged on the next boot.
    • FC16 Fase 6 delay writes (40400–40415) clamped 0–15; hysteresis (40416–40423) returns `ILLEGAL_DATA_ADDRESS` (persistence pending the CAT24C16 chip upgrade).

    Binary available on request ([email protected])

  • v1.1.0
    May 10, 2026Deprecated
    • Consolidated Modbus map at 29 holding registers (8 voltages, NTC + 16 thresholds, baud index, slave ID).
    • LCD auto-rotation between SCREEN_VOLTAGE / SCREEN_DI_FAULT / SCREEN_TEMP_FAULT / SCREEN_VOLTAGE_FAULT every 5 s.
    • Calibration password reduced to 4 digits (default 1000).
    • Threshold and baudrate persistence in EEPROM CAT24C02.
    • Baudrate support 4800 / 9600 / 19200 / 38400 / 57600 / 115200 via index at HR 40028.

    Binary available on request ([email protected])

  • v1.0.0
    Mar 17, 2026Deprecated
    • Initial release: 8 DC channels, RS-485 Modbus RTU, 16×4 LCD, 3 keys, NTC.
    • Known issue: thresholds did not persist across power-cycles (fixed in 1.1.0).

    Binary available on request ([email protected])

For beta and private channels access, talk to the application engineer assigned to your account.